The Intel Cup Embedded System Design Contest ( short for "Intel Cup Undergraduate Electronic Design Contest - Embedded System Design Invitational Contest" ) was initiated by China government, hosted by Shanghai Jiao Tong University, and is solely sponsored by Intel Corporation since 2002. Held every 2 years, the contest provides an opportunity for top undergraduate students to design a working system based on an assigned Intel embedded platform over a period of three months. Each team consists of three members, with a faculty mentor. With the rapid growth of participating teams from China mainland, the contest also attracted oversea universities since 2004. The number of oversea participants grew sequentially in 2006 and 2008.
Training and Resources
1. FPGA Introduction and Architecture of Arria II GX Device Download
2. Advanced FPGA Design Examples and In-depth Reports Link
3. Quartus II Software Design Series: Foundation Download
NDA Required
4. Quartus® II Software Design Series: Timing Analysis Download
Intel Cup Competitors Only
5. System Integration with Qsys
6. Designing with DSP Builder Standard
7. Digital Video Design Skill using FPGA
*The items marked in blue are free to download for the public.
*The items marked in green require users to sign an NDA agreement.
*The items marked in orange are for Intel Cup ESDC competitors only.